Memory devices may read and write data to memory cells, typically arranged into one or more arrays. Memory arrays may be organized into separately addressable groups, sometimes referred to as banks.
A time between the reception of a read address and the outputting of read data from a memory array within a bank, may be considered a bank read access time period Tread(Bank). Such a time period may include a precharge period during which a read address may be decoded and bit lines may be precharged. Such a time period may also include a sense period during which memory cells can be connected to bit lines, and data values on such bit lines amplified for subsequent output. It is noted that such amplified data may be subsequently output at a read register.
Similarly, a time between reception of a write address, and the storing of write data in memory cells within an accessed bank may be considered a bank write access time period Twrite(Bank). Such a time period may include a precharge period, during which a write address may be decoded, bit lines precharged, and write data may be input and applied to write amplifiers. Such a time period may also include a write period during which memory cells can be connected to bit lines, and such bit lines driven by write amplifiers to thereby write data into the memory cells.